
“With the introduction of the highest performing DRAM available today, we are taking a critical step to enhance our role as the leading innovator in the fast-growing premium memory market,” said Cheol Choi, executive vice president of Memory Sales & Marketing at Samsung Electronics. “Samsung will continue to deliver on its commitment to bring truly differentiated solutions as we reinforce our edge in the global memory marketplace.”
“This HBM2E package is then interconnected in a precise arrangement of more than 40,000 ‘through silicon via’ (TSV) microbumps, with each 16Gb die containing over 5,600 of these microscopic holes,” Samsung explains.
While the current Flashbolt solution adheres to JEDEC’s revised standard, Samsung says its proprietary circuit design for signal transmission could push the HBM2E transfer speed to 4.2Gbps, which in turn would bump the memory bandwidth to 538GB/s per stack “in certain future applications.”
Samsung anticipate volume production to kick off sometime in the first half of 2020. There is no mention of cost, which is of particular interest, given that HBM chips are comparatively expensive. For those who want a more affordable solution, however, Samsung says it will continue to offer its second-generation Aquabolt lineup.
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